The semiconductor industry is continuously moving toward the fabrication of smaller and more complex microelectronic components with higher performance. Capacitors are used in many integrated circuits for storing data, such as for dynamic random access memory. Capacitors are also used for many analog to digital or digital to analog conversions, as well as many other purposes. MIM capacitors are desirable because they are stable over a range of applied voltages and temperatures. MIM capacitors have metallic bottom and top plates separated by one or more insulator layers.
Transistors and other electronic components are also used in many integrated circuits, and the transistors, capacitors, and other electronic components are interconnected in various ways for different applications. For example, as illustrated in FIG. 1, a MIM capacitor 101 may include metal plates 102 and 103 with an insulating layer 104 therebetween and may be formed in a trench 105 adjacent a conductive structure 106. Vertical contacts are typically formed through insulating layers, and horizontal interconnects are formed within an insulating layer to electrically connect different components. Contacts, interconnects, and capacitors all use conductive materials, and in some instances the same material can be used for two or more of these components. There is a need in the art for more efficient manufacturing methods for the production of electronic components to reduce costs and improve manufacturing rates.
Conventional methods of manufacturing a MIM capacitor, require the deposition of additional materials, e.g. for the metal plates and for the dielectric layer, followed by lithography and etching processes. Existing dual damascene processes, e.g. for forming vias and metal lines, use a metal layer as a hard mask during metal and via patterning processes, and then the metal hard mask is eliminated after processing.
A need therefore exists for methodology enabling manufacture of an accurate and conformal MIM capacitor with a robust cost effective and efficient dual damascene process and the resulting device.